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1 реализация на основе логических элементов
Microelectronics: gate-level implementationУниверсальный русско-английский словарь > реализация на основе логических элементов
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Sum addressed decoder — In CPU design, a Sum Addressed Decoder or Sum Addressed Memory (SAM) Decoder is a method of reducing the latency of the CPU cache access. This is achieved by fusing the address generation sum operation with the decode operation in the cache… … Wikipedia